1. Field of the Invention
The present invention relates to the field of use of processor architecture. More particularly, the present invention relates to the use of additional scoreboard bits in register files for dynamic allocation and control of processor resources to accelerate the resolution of a data dependency stall which is causing a hardware interlock.
2. Description of Related Art
Register files are arrays in processors that store one or more architecturally defined registers. Currently, associated with each of these registers is a bit which indicates whether the data inside the respective register is either: (1) updated and ready to be used; or, (2) being modified or produced ("busy") and therefore not available. This bit is referred to as a "scoreboard" bit. Also, the use of the scoreboard bit by a mechanism to "lock-out" access to a register is referred to as a "hardware interlock." The hardware interlock is used instead of placing the extra burden for maintaining the status of each register in software.
For example, if a scoreboard bit for a particular register is set, then the next instruction which has a data dependency on this data, and therefore needs to access this register, cannot execute until the scoreboard bit has been cleared. For an in-order issue processor, this creates a condition known as a "stall." For an out-of-order issue processor this can stall any given execution unit(s), which limits execution bandwidth. To clear the register bit, a preceding operation, which is the operation that is generating/modifying the data to be placed/returned to this register, needs to complete execution. Thus, if a program were to (1) execute a LOAD of a first value and place it into a register R4; and then, (2) execute an ADD of the first value in R4 with a second value contained in a register R5; then there is a data dependency on the LOAD operation.
Although the use of a scoreboard bit in conjunction with a hardware interlock mechanism provides information as to the availability of the data contained in a register, there is no provision of determining WHAT is causing the unavailability. Specifically, there is no indication of whether the dependency is due to a memory operation (e.g., a memory LOAD operation), a register operation (e.g., a register divide operation) an instruction co-processor operation (e.g., a floating point unit operation) and other operations.